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Revert "nvn: Optimize shader performance by enhancing NVN bias settings" 

This reverts commit 19febba866.
This commit is contained in:
Zephyron 2025-04-12 15:12:19 +10:00
parent 964bbf489a
commit 3a1c178711
5 changed files with 12 additions and 25 deletions
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2
externals/Vulkan-Headers vendored

@ -1 +1 @@
Subproject commit 5ceb9ed481e58e705d0d9b5326537daedd06b97d Subproject commit 78c359741d855213e8685278eb81bb62599f8e56

2
externals/Vulkan-Utility-Libraries vendored

@ -1 +1 @@
Subproject commit 551221d913cc56218fcaddce086ae293d375ac28 Subproject commit 0d5b49b80f17bca25e7f9321ad4e671a56f70887

2
externals/VulkanMemoryAllocator vendored

@ -1 +1 @@
Subproject commit 0183545f02a599b02471b7ca42d9e94a1a87f99c Subproject commit 89d3a6a5ea35d140fe865ed493c89bde777c6a07

2
externals/vcpkg vendored

@ -1 +1 @@
Subproject commit 9b75e789ece3f942159b8500584e35aafe3979ff Subproject commit 64f3d3d6201d9cea01d15ea6e793daf0bbcd47c7

29
src/shader_recompiler/ir_opt/global_memory_to_storage_buffer_pass.cpp
View File

@ -1,5 +1,4 @@
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
// SPDX-FileCopyrightText: Copyright 2025 citron Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later // SPDX-License-Identifier: GPL-2.0-or-later
#include <optional> #include <optional>
@ -275,15 +274,8 @@ IR::Opcode GlobalToStorage(IR::Opcode opcode) {
/// Returns true when a storage buffer address satisfies a bias /// Returns true when a storage buffer address satisfies a bias
bool MeetsBias(const StorageBufferAddr& storage_buffer, const Bias& bias) noexcept { bool MeetsBias(const StorageBufferAddr& storage_buffer, const Bias& bias) noexcept {
// For performance, strongly prefer addresses that meet the bias criteria return storage_buffer.index == bias.index && storage_buffer.offset >= bias.offset_begin &&
// and have optimal alignment storage_buffer.offset < bias.offset_end;
if (storage_buffer.index == bias.index &&
storage_buffer.offset >= bias.offset_begin &&
storage_buffer.offset < bias.offset_end) {
return true;
}
// Only fall back to other addresses if absolutely necessary
return false;
} }
struct LowAddrInfo { struct LowAddrInfo {
@ -359,7 +351,7 @@ std::optional<StorageBufferAddr> Track(const IR::Value& value, const Bias* bias)
.index = index.U32(), .index = index.U32(),
.offset = offset.U32(), .offset = offset.U32(),
}; };
const u32 alignment{bias ? bias->alignment : 16U}; const u32 alignment{bias ? bias->alignment : 8U};
if (!Common::IsAligned(storage_buffer.offset, alignment)) { if (!Common::IsAligned(storage_buffer.offset, alignment)) {
// The SSBO pointer has to be aligned // The SSBO pointer has to be aligned
return std::nullopt; return std::nullopt;
@ -380,9 +372,9 @@ void CollectStorageBuffers(IR::Block& block, IR::Inst& inst, StorageInfo& info)
// avoid getting false positives // avoid getting false positives
static constexpr Bias nvn_bias{ static constexpr Bias nvn_bias{
.index = 0, .index = 0,
.offset_begin = 0x100, // Expanded from 0x110 to catch more potential storage buffers .offset_begin = 0x110,
.offset_end = 0x800, // Expanded from 0x610 to include a wider range .offset_end = 0x610,
.alignment = 32, // Increased from 16 to optimize memory access patterns .alignment = 16,
}; };
// Track the low address of the instruction // Track the low address of the instruction
const std::optional<LowAddrInfo> low_addr_info{TrackLowAddress(&inst)}; const std::optional<LowAddrInfo> low_addr_info{TrackLowAddress(&inst)};
@ -394,8 +386,7 @@ void CollectStorageBuffers(IR::Block& block, IR::Inst& inst, StorageInfo& info)
const IR::U32 low_addr{low_addr_info->value}; const IR::U32 low_addr{low_addr_info->value};
std::optional<StorageBufferAddr> storage_buffer{Track(low_addr, &nvn_bias)}; std::optional<StorageBufferAddr> storage_buffer{Track(low_addr, &nvn_bias)};
if (!storage_buffer) { if (!storage_buffer) {
// If it fails, track without a bias but with higher alignment requirements // If it fails, track without a bias
// for better performance
storage_buffer = Track(low_addr, nullptr); storage_buffer = Track(low_addr, nullptr);
if (!storage_buffer) { if (!storage_buffer) {
// If that also fails, use NVN fallbacks // If that also fails, use NVN fallbacks
@ -434,12 +425,8 @@ IR::U32 StorageOffset(IR::Block& block, IR::Inst& inst, StorageBufferAddr buffer
IR::U32 low_cbuf{ir.GetCbuf(ir.Imm32(buffer.index), ir.Imm32(buffer.offset))}; IR::U32 low_cbuf{ir.GetCbuf(ir.Imm32(buffer.index), ir.Imm32(buffer.offset))};
// Align the offset base to match the host alignment requirements // Align the offset base to match the host alignment requirements
// Use a more aggressive alignment mask for better performance
low_cbuf = ir.BitwiseAnd(low_cbuf, ir.Imm32(~(alignment - 1U))); low_cbuf = ir.BitwiseAnd(low_cbuf, ir.Imm32(~(alignment - 1U)));
return ir.ISub(offset, low_cbuf);
// Also align the resulting offset for optimal memory access
IR::U32 result = ir.ISub(offset, low_cbuf);
return result;
} }
/// Replace a global memory load instruction with its storage buffer equivalent /// Replace a global memory load instruction with its storage buffer equivalent